Figure 2From: A reconfigurable NAND/NOR genetic logic gateStatic observations of circuit. Four logic cases (combination of two binary inputs) tested with logic “0” fixed at 0 nM and logic “1” at 5 nM (deterministic simulation). Perfect NOR behaviour is observed, as the output Out is only expressed at a high level for the input case 0-0. In the other cases, Out expression is repressed (initially expressed slightly due to initial I2 concentrations). Axes shown in logarithmic scale for both Time (hours) and Concentration (nM).Back to article page