Figure 3

Continuous observations of circuit. Deterministic study of the change of Out and I₂ over time, while the four logic cases are introduced dynamically. Until t ≈ 60 both inputs are “0” (case 0-0); from 60 until t ≈ 110 input A is a logic “1” (case 1-0); until t ≈ 160 input A is “0” while input B is “1” (case 0-1); until t ≈ 210 both inputs are 1; from there onwards both inputs come back to “0”. Logic “0” represented by 0 nM, logic “1” by 5 nM.