Figure 6
From: Synthesizing genetic sequential logic circuit with clock pulse generator

A class of the clocked genetic JK flip-flops. (a) a rising edge-triggered one; and (b) a falling edge-triggered one.
From: Synthesizing genetic sequential logic circuit with clock pulse generator
A class of the clocked genetic JK flip-flops. (a) a rising edge-triggered one; and (b) a falling edge-triggered one.